Wdxms1600te driver

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My Book Essential 3TB 3. My Book Live 2TB. My Book Live 3TB. MyBook Studio. As more hardware vendors moved toward a hardware-based scheduling model, where work is submitted to the GPU directly from user mode and where the GPU manages the various queue of work itself, it became necessary to eliminate the need for VidMm to inspect and patch every command buffer before submission to a GPU engine. In this model, each process gets assigned a unique GPU virtual address space in which every GPU context to execute in.

An allocation, created or opened by a process, gets assigned a unique GPU virtual address within that process GPU virtual address space that remains constant and unique for the lifetime of the allocation.

This allows the user-mode driver to reference allocations through their GPU virtual address without having to worry about the underlying physical memory changing through its lifetime.

In the physical mode, the scheduling model remains the same as it is with WDDM v1. In the physical mode the user-mode driver continues to generate the allocation and patch location lists. They are submitted along a command buffer and are used to patch command buffers to actual physical addresses before submission to an engine.

In the virtual mode, an engine references memory through GPU virtual addresses. In this mode the user-mode driver generates command buffers directly from user mode and uses new services to submit those commands to the kernel.

The user-mode driver does not generate allocation or patch location lists, although it is still responsible for managing the residency of allocations. A driver must opt-in to support either or both of the models. A single GPU node can support both modes simultaneously. In the GpuMmu model, VidMm manages the GPU memory management unit and underlying page tables, and exposes services to the user-mode driver that allow it to manage GPU virtual address mapping to allocations.

The page tables could point to system memory or local device memory. There is no need to manage a separate set of page tables in GPU-accessible memory. That said, the IoMmu model can result in degraded performance due to the overhead of address translation and management.